7.3.3 FMC Register (Offset = 0x8) [reset = 0x0]
Flash Memory Control (FMC)
When this register is written, the Flash memory controller initiates the appropriate access cycle for the location specified by the Flash Memory Address (FMA) register (see Section 7.3.1). If the access is a write access, the data contained in the Flash Memory Data (FMD) register (see Section 7.3.2) is written to the specified address.
For non-volatile registers, FMPREn, FMPPEn, USER_REGn, and USER_REGn, the respective register is programmed with the value to be written rather than the FMD register.
This register must be the final register written and initiates the memory operation. The four control bits in the lower byte of this register are used to initiate memory operations.
Care must be taken not to set multiple control bits as the results of such an operation are unpredictable.
FMC is shown in Figure 7-11 and described in Table 7-10.
Return to Summary Table.
Figure 7-11 FMC Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
| WRKEY |
| W-0x0 |
|
| 23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| WRKEY |
| W-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
| RESERVED |
| R-0x0 |
|
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
COMT |
MERASE |
ERASE |
WRITE |
| R-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
|
Table 7-10 FMC Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-16 |
WRKEY |
W |
0x0 |
Flash Memory Write Key
This field contains a write key, which is used to minimize the incidence of accidental Flash memory writes.
The value 0xA442 or the PEKEY value in the FLPEKEY register must be written into this field for a Flash memory write to occur.
The use of 0xA442 or PEKEY is dependent on the value of the KEY bit in the BOOTCFG register at 0x1D0.
Writes to the FMC register without this WRKEY value are ignored.
A read of this field returns the value 0. |
| 15-4 |
RESERVED |
R |
0x0 |
|
| 3 |
COMT |
R/W |
0x0 |
Commit Register Value
This bit is used to commit writes to Flash-memory-resident registers and to monitor the progress of that process.
0x0 = A write of 0 has no effect on the state of this bit.When read, a 0 indicates that the previous commit access is complete.
0x1 = Set this bit to commit (write) the register value to a Flash-memory-resident register.When read, a 1 indicates that the previous commit access is not complete.
|
| 2 |
MERASE |
R/W |
0x0 |
Mass Erase Flash Memory
This bit is used to mass erase the Flash main memory and to monitor the progress of that process.
For information on erase time, see the device-specific data sheet.
0x0 = A write of 0 has no effect on the state of this bit.When read, a 0 indicates that the previous mass erase access is complete.
0x1 = Set this bit to erase the Flash main memory.When read, a 1 indicates that the previous mass erase access is not complete.
|
| 1 |
ERASE |
R/W |
0x0 |
Erase a Page of Flash Memory
This bit is used to erase a page of Flash memory and to monitor the progress of that process.
For information on erase time, see the device-specific data sheet.
0x0 = A write of 0 has no effect on the state of this bit.When read, a 0 indicates that the previous page erase access is complete.
0x1 = Set this bit to erase the Flash memory page specified by the contents of the FMA register.When read, a 1 indicates that the previous page erase access is not complete.
|
| 0 |
WRITE |
R/W |
0x0 |
Write a Word into Flash Memory
This bit is used to write a word into Flash memory and to monitor the progress of that process.
For information on programming time, see the device-specific data sheet.
0x0 = A write of 0 has no effect on the state of this bit.When read, a 0 indicates that the previous write update access is complete.
0x1 = Set this bit to write the data stored in the FMD register into the Flash memory location specified by the contents of the FMA register.When read, a 1 indicates that the write update access is not complete.
|