SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Flash Memory Protection Read Enable 0 (FMPRE0), offset 0x200
Flash Memory Protection Read Enable 1 (FMPRE1), offset 0x204
Flash Memory Protection Read Enable 2 (FMPRE2), offset 0x208
Flash Memory Protection Read Enable 3 (FMPRE3), offset 0x20C
Flash Memory Protection Read Enable 4 (FMPRE4), offset 0x210
Flash Memory Protection Read Enable 5 (FMPRE5), offset 0x214
Flash Memory Protection Read Enable 6 (FMPRE6), offset 0x218
Flash Memory Protection Read Enable 7 (FMPRE7), offset 0x21C
Flash Memory Protection Read Enable 8 (FMPRE8), offset 0x220
Flash Memory Protection Read Enable 9 (FMPRE9), offset 0x224
Flash Memory Protection Read Enable 10 (FMPRE10), offset 0x228
Flash Memory Protection Read Enable 11 (FMPRE11), offset 0x22C
Flash Memory Protection Read Enable 12 (FMPRE12), offset 0x230
Flash Memory Protection Read Enable 13 (FMPRE13), offset 0x234
Flash Memory Protection Read Enable 14 (FMPRE14), offset 0x238
Flash Memory Protection Read Enable 15 (FMPRE15), offset 0x23C
This register stores the read-only protection bits for each 2KB flash block (FMPPEn stores the execute-only bits). Note that for protecting sectors, eight bits need to be cleared to create a 16KB read-protected sector.
This register is loaded during the power-on reset sequence. The factory settings for the FMPREn and FMPPEn registers are a value of 1 for all implemented banks. This achieves a policy of open access and programmability. The register bits may be changed by writing the specific register bit. However, this register is RW0; the user can only change the protection bit from a 1 to a 0 (and may NOT change a 0 to a 1). The changes are not permanent until the register is committed (saved), at which point the bit change is permanent. If a bit is changed from a 1 to a 0 and not committed, it may be restored by executing a power-on reset sequence. The reset value shown only applies to power-on reset; any other type of reset does not affect this register. Once committed, the only way to restore the factory default value of this register is to perform the "Recover Locked Device" sequence detailed in the JTAG chapter.
NOTE
Do not clear bits [7:0] of the FMPRE0 register to read protect the first 16KB of the flash memory. If this part of memory is read protected, the device cannot boot up, because the ROM reads address 0x4 to determine if a valid application resides in flash memory.
Each FMPREn register controls a 64K block. For additional information, see Section 7.2.3.4.
FMPRE is shown in Figure 7-45 and described in Table 7-47.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| READ_ENABLE | |||||||||||||||||||||||||||||||
| R/W-0xFFFFFFFF | |||||||||||||||||||||||||||||||