SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The System Exception module provides control and status of the system-level interrupts. All the interrupt events are ORed together before being sent to the interrupt controller, so the System Exception module can generate only one interrupt request to the controller at any given time. Software can service multiple interrupt events in a single interrupt service routine by reading the System Exception Masked Interrupt Status (SYSEXCMIS) register. The interrupt events that can trigger a controller-level interrupt are defined in the System Exception Interrupt Mask (SYSEXCIM) register by setting the corresponding interrupt mask bits. If interrupts are not used, the raw interrupt status is always visible through the System Exception Raw Interrupt Status (SYSEXCRIS) register. Interrupts are always cleared (for both the SYSEXCMIS and SYSEXCRIS registers) by writing 1 to the corresponding bit in the System Exception Interrupt Clear (SYSEXCIC) register.