18.5.27 GPTMPP Register (Offset = 0xFC0) [reset = 0x70]
GPTM Peripheral Properties (GPTMPP)
The GPTMPP register provides information regarding the properties of the General-Purpose Timer module.
GPTMPP is shown in Figure 18-35 and described in Table 18-38.
Return to Summary Table.
Figure 18-35 GPTMPP Register
| 31 |
30 |
29 |
28 |
27 |
26 |
25 |
24 |
| RESERVED |
| R-0x0 |
|
| 23 |
22 |
21 |
20 |
19 |
18 |
17 |
16 |
| RESERVED |
| R-0x0 |
|
| 15 |
14 |
13 |
12 |
11 |
10 |
9 |
8 |
| RESERVED |
| R-0x0 |
|
| 7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
| RESERVED |
ALTCLK |
SYNCCNT |
CHAIN |
SIZE |
| R-0x0 |
R-0x1 |
R-0x1 |
R-0x1 |
R-0x0 |
|
Table 18-38 GPTMPP Register Field Descriptions
| Bit |
Field |
Type |
Reset |
Description |
| 31-7 |
RESERVED |
R |
0x0 |
|
| 6 |
ALTCLK |
R |
0x1 |
Alternate Clock Source
0x0 = The alternate clock source (ALTCLK) is not available to the Timer module.
0x1 = The alternate clock source (ALTCLK) is available to the Timer module.
|
| 5 |
SYNCCNT |
R |
0x1 |
Synchronize Start
0x0 = Timer is not capable of synchronizing the counter value with other GPTimers.
0x1 = Timer is capable of synchronizing the counter value with other Timers.
|
| 4 |
CHAIN |
R |
0x1 |
Chain with Other Timers.
Note that although this bit is set for Timer 0A, this timer cannot chain because there is not a previously numbered Timer.
0x0 = Timer is not capable of chaining with the previously numbered Timer.
0x1 = Timer is capable of chaining with the previously numbered Timer.
|
| 3-0 |
SIZE |
R |
0x0 |
Count Size
0x0 = Timer A and Timer B counters are 16 bits each with an 8-bit prescale counter.
0x1 = Timer A and Timer B counters are 32 bits each with a 16-bit prescale counter.
|