20.3.2.1 Interrupts
Interrupts in this LCD module are related to DMA engine operation. Five registers are used to control and monitor the interrupts:
- LCDLIDDCTL and LCDRASTRCTL registers enable and disable individual features that can generate interrupts.
- The LCD Interrupt Raw Status and Set Register (LCDRISSET) register, offset 0x058, collects all of the interrupt status information.
- The LCD Interrupt Status and Clear (LCDMISCLR) register, offset 0x05C, is used to read and clear the status of the masked interrupt triggers.
- The LCD Interrupt Mask (LCDIM) register, offset 0x060, is used to control whether an interrupt source is masked or not.