17.1 Introduction
The GPIO module has the following features:
- Up to 140 GPIOs, depending on configuration
- Highly flexible pin muxing allows use as GPIO or one of several peripheral functions
- 3.3 -V-tolerant in input configuration
- Advanced High Performance Bus accesses all ports:
- Ports A to H and J; Ports K to N and P to T
- Fast toggle capable of a change every clock cycle for ports on AHB
- Programmable control for GPIO interrupts
- Interrupt generation masking
- Edge-triggered on rising, falling, or both
- Level-sensitive on High or Low values
- Per-pin interrupts available on Port P and Port Q
- Bit masking in both read and write operations through address lines
- Can be used to initiate an ADC sample sequence or a μDMA transfer
- Pin state can be retained during Hibernation mode ; pins on port P can be programmed to wake on level in Hibernation mode
- Pins configured as digital inputs are Schmitt-triggered
- Programmable control for GPIO pad configuration
- Weak pullup or pulldown resistors
- 2-mA, 4-mA, 6-mA, 8-mA, 10-mA and 12-mA pad drive for digital communication; up to four pads can sink 18-mA for high-current applications
- Slew rate control for 8-mA, 10-mA and 12-mA pad drive
- Open drain enables
- Digital input enables