6.1 Introduction
The Hibernation also integrates a tamper module which provides mechanisms to detect, respond to, and log system tampering events. The Tamper module is designed to be low power and operate from either a battery or the MCU I/O voltage supply.
The Hibernation module has the following features:
- 32-bit real-time seconds counter (RTC) with 1/32768 second resolution and a 15-bit subseconds counter
- 32-bit RTC seconds match register and a 15-bit subseconds match for timed wake-up and interrupt generation with 1/32768 second resolution
- RTC predivider trim for making fine adjustments to the clock rate
- Hardware Calendar Function
- Year, Month, Day, Day of Week, Hours, Minutes, Seconds
- Four-year leap compensation
- 24-hour or AM/PM configuration
- Two mechanisms for power control
- System power control using discrete external regulator
- On-chip power control using internal switches under register control
- VDD supplies power when valid, even if VBAT > VDD
- Dedicated pin for waking using an external signal
- Capability to configure external reset (RST) pin and/or up to four GPIO port pins as wake source, with programmable wake level
- Tamper Functionality
- Support for four tamper inputs
- Configurable level, weak pullup, and glitch filter
- Configurable tamper event response
- Logging of up to four tamper events
- Optional BBRAM erase on tamper detection
- Tamper wake from hibernate capability
- Hibernation clock input failure detect with a switch to the internal oscillator on detection
- RTC operational and hibernation memory valid as long as VDDor VBATis valid
- Low-battery detection, signaling, and interrupt generation, with optional wake on low battery
- GPIO pin state can be retained during hibernation
- Clock source from a n internal low frequency oscillator (HIB LFIOSC) or a 32.768-kHz external crystal or oscillator
- Sixteen 32-bit words of battery-backed memory to save state during hibernation
- Programmable interrupts for:
- RTC match
- External wake
- Low battery