SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The pixel clock (LCDCP) frequency is derived from the system clock, which is the internal reference clock (MCLK) to the LCD module. The pixel clock is used by the LCD display to clock the pixel data into the line shift register. The formula used for the pixel clock is:
LCDCP = System Clock / CLKDIV
where CLKDIV is a field in the LCD Control (LCDCTL) register. The value of CLKDIV should not be 0 or 1 in Raster Mode. The pixel clock operates differently depending on the mode of the LCD controller: