SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
The µDMA controller responds to two types of requests from a peripheral: single or burst. Each peripheral may support either or both types of requests. A single request means that the peripheral is ready to transfer one item, while a burst request means that the peripheral is ready to transfer multiple items.
The µDMA controller responds differently depending on whether the peripheral is making a single request or a burst request. If both are asserted, and the µDMA channel has been set up for a burst transfer, then the burst request takes precedence. Table 8-1 shows how each peripheral supports the two request types.
| Peripheral | Event That Generates Single Request | Event That Generates Burst Request |
|---|---|---|
| ADC | FIFO not empty | FIFO half full |
| EPI WFIFO | None | WFIFO level (configurable) |
| EPI NBRFIFO | None | NBRFIFO level (configurable) |
| General-Purpose Timer | None | Trigger event |
| GPIO | None | Trigger event |
| I2C TX | TX buffer not full | TX FIFO level (configurable) |
| I2C RX | RX buffer not empty | RX FIFO level (configurable) |
| SSI TX | TX FIFO not full | TX FIFO level (fixed at 4) |
| SSI RX | RX FIFO not empty | RX FIFO level (fixed at 4) |
| UART TX | TX FIFO not full | TX FIFO level (configurable) |
| UART RX | RX FIFO not empty | RX FIFO level (configurable) |
| SHA/MD5 | None | Context in DMA request (SHA/MD5 0 Cin)
Context out DMA request (SHA/MD5 0 Cout) Data In DMA request (SHA/MD5 0 Din) |
| AES | None | Context in DMA request (AES0 Cin)
Context out DMA request (AES0 Cout) Data in DMA request (AES0 Din) Data out DMA request (AES0 Dout) |
| DES | None | Context in DMA request (DES0 Cin)
Data in DMA request (DES0 Din) Data out DMA request (DES0 Dout) |