SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
SHA Digest Count (SHA_DIGEST_COUNT)
This register is written with the initial digest count and can be read to determine the digest count result. Note that for Initial Digest Count writes, bits 5:0 must be zero. This register is written the initial digest byte count when both the HMAC_KEY_PROC bit and the ALGO_CONSTANT bit is zero in the SHA_MODE register. When either the HMAC_KEY_PROC bit or the ALGO_CONSTANT bit is 1, this register does not need to be written because it is overwritten with 64 or 0 automatically. When starting an HMAC operation from precomputes (HMAC_KEY_PROC =0), the value 64 must be written in the SHA_DIGESTCOUNT register. Note that the value written should always be a 64 byte multiple, the lower 6 bits written are ignored. The updated digest byte count (initial digest byte count + bytes processed) can be read from this register when the status register indicates that the operation is done or when a µDMA context out is requested.
SHA_DIGEST_COUNT is shown in Figure 25-5 and described in Table 25-16.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 | 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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