SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
Analog-to-Digital Converter Software Reset (SRADC)
The SRADC register lets software reset the available ADC modules.
A peripheral is reset by software using a simple 2-step process:
There may be latency from the clearing of the SRADC bit to when the peripheral is ready for use. Software should check the corresponding PRADC bit to verify that the ADC module registers are ready to be accessed.
NOTE
Use this register to reset the ADC modules.
SRADC is shown in Figure 4-82 and described in Table 4-89.
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| 31 | 30 | 29 | 28 | 27 | 26 | 25 | 24 | 23 | 22 | 21 | 20 | 19 | 18 | 17 | 16 |
| RESERVED | |||||||||||||||
| R-0x0 | |||||||||||||||
| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| RESERVED | R1 | R0 | |||||||||||||
| R-0x0 | R/W-0x0 | R/W-0x0 | |||||||||||||