SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
USB Chirp Time-out (USBCTO)
OTG A / Host
OTG B / Device
This register sets the chirp time-out. This number, when multiplied by four, represents the number of SYSCLK cycles before the time-out occurs. That is, if SYSCLK is 30MHz, this number represents the number of 133 ns time intervals before the time-out occurs. If SYSCLK is 60MHz, this number represents the number of 67ns time intervals before the time-out occurs. Although this bit is written by the host in the CLK domain, the counter that utilizes this value is in the SYSCLK domain. No time domain crossing is provided as the value in this register is a static.
USBCTO is shown in Figure 27-68 and described in Table 27-75.
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| 15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 | 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
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