SLAU723A October 2017 – October 2018 MSP432E401Y , MSP432E411Y
USB Transmit FIFO Start Address (USBTXFIFOADD), offset 0x064
USB Receive FIFO Start Address (USBRXFIFOADD), offset 0x066
OTG A / Host
OTG B / Device
USBTXFIFOADD and USBRXFIFOADD are 16-bit registers that control the start address of the selected transmit and receive endpoint FIFOs.
USBnXFIFOADD is shown in Figure 27-21 and described in Table 27-26.
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15 | 14 | 13 | 12 | 11 | 10 | 9 | 8 |
RESERVED | ADDR | ||||||
R-0x0 | R/W-0x0 | ||||||
7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
ADDR | |||||||
R/W-0x0 | |||||||