27.5.56 USBTXDPKTBUFDIS Register (Offset = 0x342) [reset = 0x0]
USB Transmit Double Packet Buffer Disable (USBTXDPKTBUFDIS)
OTG A / Host
OTG B / Device
USBTXDPKTBUFDIS is a 16-bit register that indicates which of the transmit endpoints have disabled the double-packet buffer functionality (see Section 27.3.1.2.2).
USBTXDPKTBUFDIS is shown in Figure 27-67 and described in Table 27-74.
Return to Summary Table.
Figure 27-67 USBTXDPKTBUFDIS Register
7 |
6 |
5 |
4 |
3 |
2 |
1 |
0 |
EP7 |
EP6 |
EP5 |
EP4 |
EP3 |
EP2 |
EP1 |
RESERVED |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R/W-0x0 |
R-0x0 |
|
Table 27-74 USBTXDPKTBUFDIS Register Field Descriptions
Bit |
Field |
Type |
Reset |
Description |
7 |
EP7 |
R/W |
0x0 |
EP7 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
6 |
EP6 |
R/W |
0x0 |
EP6 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
5 |
EP5 |
R/W |
0x0 |
EP5 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
4 |
EP4 |
R/W |
0x0 |
EP4 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
3 |
EP3 |
R/W |
0x0 |
EP3 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
2 |
EP2 |
R/W |
0x0 |
EP2 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
1 |
EP1 |
R/W |
0x0 |
EP1 TX Double-Packet Buffer Disable.
0x0 = Disables double-packet buffering.
0x1 = Enables double-packet buffering.
|
0 |
RESERVED |
R |
0x0 |
|