SLAU776A May   2018  – December 2023 ADC12DL2500 , ADC12DL3200

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
    1.     Related Documentation
      1.      Technical Reference Documents
      2.      TSW14DL3200EVM Operation
  5. 2Equipment
    1. 2.1 Evaluation Board Feature Identification Summary
    2. 2.2 Required Equipment
  6. 3Setup Procedure
    1. 3.1  Install the High Speed Data Converter (HSDC) Pro Software
    2. 3.2  Install the Configuration GUI Software
    3. 3.3  Connect the EVM and TSW14DL3200EVM
    4. 3.4  Connect the Power Supplies to the Boards (Power Off)
    5. 3.5  Connect the Signal Generators to the EVM (*RF Outputs Disabled Until Directed)
      1. 3.5.1 If External Clocking is Used (Optional)
    6. 3.6  Turn On the TSW14DL3200EVM Power and Connect to the PC
    7. 3.7  Turn On the ADC12DLXX00EVM 5-V Power Supply and Connect to the PC
    8. 3.8  Turn On the Signal Generator RF Outputs
    9. 3.9  Open the ADC12DLXX00EVM GUI and Program the ADC and Clocks
    10. 3.10 Calibrate the ADC Device on the EVM
    11. 3.11 Open the HSDC Software and Load the FPGA Image to the TSW14DL3200EVM
    12. 3.12 Capture Data Using the HSDC Pro Software
  7. 4Device Configuration
    1. 4.1 Tab Organization
    2. 4.2 Low-Level Control
  8.   A Troubleshooting the ADC12DL3200EVM
  9.   B Optional ADC12DL3200EVM Configurations
  10.   C Revision History

3.5.1 If External Clocking is Used (Optional)

Connect a signal generator to the DEVCLK input of the EVM through a bandpass filter. This signal generator must be a low-noise signal generator. TI recommends a Trilithic-tunable bandpass filter to filter the signal coming from the generator. Configure the signal generator for the desired clock frequency in the range of 0.8 to 3.2 GHz. For best performance when using an RF signal generator, the power input to the CLK SMA connector must be 9 dBm (2.2 Vpp into 50 Ω). The signal generator must increase above 9 dB by an amount equal to any additional attenuation in the clock signal path, such as the insertion loss of the bandpass filter. For example, if the filter insertion loss is 2 dB, the signal generator must be set to 9 dBm + 2 dB = 11 dBm.