SLAU833A May 2020 – October 2020 ADC12DJ3200
The Vivado Design Suite by Xilinx, is required to load firmware to the FPGA and extract captured data from the FPGA. See the Vivado Design Suite on Xilinx.com: https://www.xilinx.com/products/design-tools/vivado for more details. The latest build that supports this integration is Vivado 2019.1.