SLAU858A november   2021  – june 2023

 

  1.   1
  2.   AFE881H1 Evaluation Module
  3.   Trademarks
  4. 1Overview
    1. 1.1 Kit Contents
    2. 1.2 Related Documentation From Texas Instruments
  5. 2USB2ANY Interface Adapter
    1. 2.1 Signal Definitions for J10
    2. 2.2 USB2ANY Theory of Operation
  6. 3EVM Hardware Overview
    1. 3.1 Electrostatic Discharge Caution
    2. 3.2 EVM Block Diagram
    3. 3.3 EVM Jumper Summary
    4. 3.4 Terminal and Pin Definitions
    5. 3.5 Connecting the USB2ANY
    6. 3.6 Connecting the USB Cable to the USB2ANY Interface Adapter
    7. 3.7 Optional EVM Operations
      1. 3.7.1 Power Configuration
      2. 3.7.2 External SPI and UART Controllers
  7. 4Software Overview
    1. 4.1 Software Installation
    2. 4.2 Launching the Software
    3. 4.3 Software Features
      1. 4.3.1 AFE881H1 Register Page
      2. 4.3.2 High Level Configuration Page
      3. 4.3.3 Using the Python Scripting Tool
  8. 5Schematics, PCB Layout, and Bill of Materials
    1. 5.1 Board Schematic
    2. 5.2 PCB Components Layout
    3. 5.3 Bill of Materials
  9. 6Revision History

EVM Jumper Summary

Table 3-1 summarizes all of the EVM jumper functionality.

Table 3-1 AFE881H1EVM Jumper Summary
Header Name Function

J2

PVDD to IOVDD

Short 1-2 – PVDD connected to IOVDD

Open 1-2 – PVDD, IOVDD disconnected (default)

J3

USB 3.3V

Short 1-2 – PVDD connected to USB2ANY 3p3V (default)

Open 1-2 – PVDD disconnected from USB2ANY 3p3V

Short 3-4 – IOVDD connected to USB2ANY 3p3V (default)

Open 3-4 – IOVDD disconnected from USB2ANY 3p3V

J5

Ext REF

Short 1-2 – VREFIO connected to external reference

Open 1-2 – VREFIO disconnected from external reference (default)

J6

IOVDD Shunt

Short 1-2 – IOVDD connected to device (default)

Open 1-2 – IOVDD disconnected from device

J7

REF EN

Short 1-2 – REFEN connected to IOVDD (default)

Short 2-3 – REFEN connected to GND

J8

UARTIN

Short 1-2 – UART_IN connected to bus transceiver (default)

Open 1-2 – UART_IN disconnected from bus transceiver

J13

POL SEL

Short 1-2 – POL_SEL connected to PVDD through 100-kΩ resistor

Short 2-3 – POL_SEL connected to GND through 100-kΩ resistor (default)

J14

Resistor Load

Short 1-2 – VOUT connected to 10-kΩ load

Open 1-2 – VOUT no resistive load (default)

J17

Cap Load

Short 1-2 – VOUT connected to 100-pF load

Open 1-2 – VOUT no capacitive load (default)

J19, J20

FILT SEL

Short 1-2 – HART IN pin external filter selected

Short 2-3 – HART IN pin internal filter selected

J23

Level Translator

Short 1-2 – Bus transceiver OE connected to GND (default)

Short 2-3 – Bus transceiver OE connected to IOVDD

Figure 3-2 shows the default jumper settings with the device using USB power. The EVM can be fully operated using only the USB2ANY connector for both power and communication.

GUID-20210619-CA0I-CWDD-SDMP-QKM9WRQTFQMX-low.svg Figure 3-2 Default Header Settings for the AFE881H1EVM