SLAU899 August   2023

 

  1.   1
  2.   Description
  3.   Features
  4.   4
  5. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  6. 2Hardware
    1. 2.1 EVM Setup and Operation
    2. 2.2 Pin Configuration of the ISOM8110 Single-Channel Opto-Emulator with Analog Transistor Output
  7. 3Hardware Design Files
    1. 3.1 Schematics
    2. 3.2 PCB Layout and 3D Diagram
    3. 3.3 Bill of Materials
  8. 4Additional Information
    1.     Trademarks

2.1 EVM Setup and Operation

Basic EVM Setup

This section describes the setup and operation of the EVM for parameter performance evaluation. Figure 3-1 shows a typical test configuration of the ISOM8110 Opto-Emulator EVM using a current source.

GUID-20230513-SS0I-49KB-XFCJ-BVHZ4LJJKSTX-low.svg Figure 2-1 Basic EVM Operation

ISOM8110DFGEVM has do not populate (DNP) footprints for components which can be populated to apply different test conditions to the device. Section 2.1 lists and describes possible test configurations that can be achieved by modifying different components on the EVM.

Table 2-1 Component Configurations
Component Description
R1 R1 is sized for 5V operation. If a larger supply is needed, then select a resistor that provides the proper IF current to the anode.
J3 Shunt J3 to use the output as a high side output (emitter pin). Never shunt J3 and J4 at the same time.
J4 Shunt J4 to use the output as a low side output (collector pin). Never shunt J3 and J4 at the same time.
C1, C2 C1 and C2 can be used to add capacitance to the input diode or collector output, respectively.