SLAU905A August   2023  – November 2023 DAC81401

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
  7. 2Software
    1. 2.1 GUI Installation
    2. 2.2 Software Description
  8. 3Hardware
    1. 3.1 Power Requirements
    2. 3.2 Jumper Information
    3. 3.3 Setup
    4. 3.4 Header Information
    5. 3.5 Test Points
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Compliance Information
    1. 5.1 Compliance and Certifications
  11. 6Additional Information
    1. 6.1 Trademarks
  12. 7Revision History

3.2 Jumper Information

The jumpers must be connected properly to operate the DAC81401EVM for it's intended operation. Table 3-2 provides the details of the configurable jumper settings on the EVM. Figure 3-1 and Figure 3-2 shows the default jumper connections on the board with High-voltage gain stage enabled and High-voltage gain stage disabled respectively.

Table 3-2 DAC81401EVM Jumper Summary
HeaderNameFunction
J1DVDD=USB5V

Short 1-2 – DVDD = 5 V supplied through USB power (default)

Open – DVDD supplied through J6

J2AVSS SEL

Short 1-2 – AVSS supplied through J3

Short 2-3 – AVSS connected to board GND (default)

Open – AVSS supply pin is floating (not recommended)

J5IOVDD SEL

Short 1-2 – IOVDD = 1.8V supplied through LDO (U12) output

Short 2-3 – IOVDD = 3.3V supplied through LDO (U11) output (default)

Open – IOVDD = 1.8V supplied through J7

J10

DAC CHANNEL TP

Short 1-2 – DAC81401 VOUT is connected to VSENSEP pin (default)

Short 3-4 – DAC81401 VSENSEN pin connected to GND (default)

Open(1-2 and 3-4) – VOUT, VSENSEP and VSENSEN pins of the DAC81401 are floating (not recommended)

J17VOUT-GND SEL

Short 1-2 – OPA593 +IN (U2)connected to DAC81401 output

Short 2-3 – OPA593 +IN (U2) connected to GND (default)

Open – OPA593 +IN (U2) pin is floating (not recommended)

J18DAC CHANNEL TP

Short 1-2 – OPA593 OUT (U2) connected to OPA593 +IN (U5) pin

Short 3-4 – DAC81401 VSENSEN pin connected to GND

Open(1-2 and 3-4) – High voltage gain stage is not connected to DAC81401 (default)

J19PULL-UP

Short 1-2 – pulled down to GND and OPA593 (U2,U5) is in power down mode

Open – OPA_EN = 1 bit : OPA593 (U2,U5) is in active mode and OPA_EN bit = 0: OPA593 (U2,U5) is in active mode (default)

J21VSENSEN

Short 1-2 – VSENSEN of high voltage gain stage is connected to DAC81401 VSENSEN pin

Open – VSENSEN of high voltage gain stage is open (default)

J24VSENSEP

Short 1-2 – VSENSEP of high voltage gain stage is connected to DAC81401 VSENSEP pin

Open – VSENSEP of high voltage gain stage is open (default)

J22LEVEL SHIFT ENABLE

Short 1-2 – Digital buffers (U8,U10) enabled

Open – Digital buffers (U8,U10) disabled

GUID-20230724-SS0I-BKG4-JFHG-SXFM1C1B5Q4X-low.svgFigure 3-1 Default Header Settings with High Voltage Gain Stage Enabled
GUID-20230724-SS0I-6XLT-VTZW-0CKVHFRM74ND-low.svgFigure 3-2 Default Header Settings with High Voltage Gain Stage Disabled