SLAU915 May   2024 ULC1001

 

  1.   1
  2.   Description
  3.   Get Started
  4.   Features
  5.   5
  6. 1Evaluation Module Overview
    1. 1.1 Introduction
    2. 1.2 Kit Contents
    3. 1.3 Specification
    4. 1.4 Device Information
    5. 1.5 General Texas Instruments High Voltage Evaluation (TI HV EVM) User Safety Guidelines
  7. 2Hardware
    1. 2.1 Hardware Information
    2. 2.2 Connection Procedure
  8. 3Software
    1. 3.1 GUI Setup
    2. 3.2 System Overview
      1. 3.2.1 System ISR Period
      2. 3.2.2 System Drive Voltage
      3. 3.2.3 System Calibration
        1. 3.2.3.1 DC Bias Calibration
        2. 3.2.3.2 Temperature Calibration
        3. 3.2.3.3 Auto Sense Calibration
        4. 3.2.3.4 Cleaning and Power Calibration
      4. 3.2.4 System Cleaning
      5. 3.2.5 System Diagnostics
    3. 3.3 GUI Overview
      1. 3.3.1 GUI Top Level Layout
        1. 3.3.1.1 North Pane
        2. 3.3.1.2 South Pane
        3. 3.3.1.3 Center Pane
      2. 3.3.2 High Level Page
        1. 3.3.2.1 Burst Parameters
        2. 3.3.2.2 Calibration Settings
          1. 3.3.2.2.1 Voltage and Current Sense Circuitry
        3. 3.3.2.3 Cleaning Mode Settings
          1. 3.3.2.3.1 Auto-Cleaning
          2. 3.3.2.3.2 Water Cleaning
          3. 3.3.2.3.3 Deice Cleaning
          4. 3.3.2.3.4 Mud Cleaning Mode
        4. 3.3.2.4 Power and Diagnostic Settings
      3. 3.3.3 Register Map Page
      4. 3.3.4 I2C Configuration Page
      5. 3.3.5 GUI Functions
        1. 3.3.5.1 Monitor Communication Status
        2. 3.3.5.2 Load and Save Configuration Files
          1. 3.3.5.2.1 MSP430 Firmware Programming
        3. 3.3.5.3 Re-initialize System
        4. 3.3.5.4 Fault and Flag Monitoring and Clearing
        5. 3.3.5.5 Run Calibration
        6. 3.3.5.6 Run Cleaning Modes
        7. 3.3.5.7 Run Diagnostic Mode
        8. 3.3.5.8 Run Abort
        9. 3.3.5.9 Script Recording
  9. 4Hardware Design Files
    1. 4.1 Schematics
    2. 4.2 PCB Layouts
    3. 4.3 Bill of Materials (BOM)
  10. 5Additional Information
    1. 5.1 Trademarks

4.2 PCB Layouts

The ULC1001-DRV2911 EVM Layer Plots are shown in the figures below.

ULC1001-DRV2911EVM Top LayerFigure 4-4 Top Layer
ULC1001-DRV2911EVM Signal Layer 2Figure 4-6 Signal Layer 2
ULC1001-DRV2911EVM Board DimensionsFigure 4-8 Board Dimensions
ULC1001-DRV2911EVM Signal Layer 1Figure 4-5 Signal Layer 1
ULC1001-DRV2911EVM Bottom LayerFigure 4-7 Bottom Layer