SLAU927B June   2024  – November 2024 MSPM0G3507

 

  1.   1
  2.   Abstract
  3.   Trademarks
  4. 1Introduction
  5. 2Hardware Setup
    1. 2.1  EVM Hardware Setup
      1. 2.1.1 EVM Hardware Support
    2. 2.2  Pin Configurations for IPD Usage
    3. 2.3  Pin Configurations for PWM Outputs
    4. 2.4  Pin Configurations for ADC Currents
    5. 2.5  Pin Configurations for ADC Voltages
    6. 2.6  Pin Configurations for Faults
    7. 2.7  Pin Configurations for GPIO Output Functions
    8. 2.8  Pin Configurations for SPI Communication
    9. 2.9  Pin Configurations for UART Communication
    10. 2.10 External Connections for Evaluation Boards
  6. 3Software Setup
  7. 4GUI Setup
    1. 4.1 Serial Port Configuration
    2. 4.2 GUI Home Page
    3. 4.3 System Configurations
    4. 4.4 Register Map
    5. 4.5 Motor Tuning Page
    6. 4.6 Collateral Page
  8. 5Register Map
    1. 5.1 Register Map Page in GUI
    2. 5.2 User Control Registers (Base Address = 0x20200400h)
      1. 5.2.1 Speed Control Register (Offset = 0h) [Reset = 00000000h]
      2. 5.2.2 Algo Debug Control 1 Register (Offset = 4h) [Reset = 00000000h]
      3. 5.2.3 Algo Debug Control 2 Register (Offset = 8h) [Reset = 00000000h]
      4. 5.2.4 Algo Debug Control 3 Register (Offset = Ch) [Reset = 00000000h]
      5. 5.2.5 DAC Configuration Register (Offset = 10h) [Reset = 00000000h]
    3. 5.3 User Input Registers (Base Address = 0x20200000h)
      1. 5.3.1  SYSTEM_PARAMETERS (Offset = 0h)
      2. 5.3.2  ISD_CONFIG Register (Offset = 38h) [Reset = 00000000h]
      3. 5.3.3  RVS_DRV_CONFIG Register (Offset = 3Ch) [Reset = 00000000h]
      4. 5.3.4  MOTOR_STARTUP1 Register (Offset = 40h) [Reset = 00000000h]
      5. 5.3.5  MOTOR_STARTUP2 Register (Offset = 44h) [Reset = 00000000h]
      6. 5.3.6  CLOSED_LOOP1 Register (Offset = 48h) [Reset = 00000000h]
      7. 5.3.7  CLOSED_LOOP2 Register (Offset = 4Ch) [Reset = 00000000h]
      8. 5.3.8  FIELD_CTRL Register (Offset = 50h) [Reset = 00000000h]
      9. 5.3.9  FAULT_CONFIG1 Register (Offset = 54h) [Reset = 00000000h]
      10. 5.3.10 FAULT_CONFIG2 Register (Offset = 58h) [Reset = 00000000h]
      11. 5.3.11 MISC_ALGO Register (Offset = 5Ch) [Reset = 00000000h]
      12. 5.3.12 PIN_CONFIG Register (Offset = 60h) [Reset = 00000000h]
      13. 5.3.13 PERI_CONFIG Register (Offset = 64h) [Reset = 00000000h]
    4. 5.4 User Status Registers (Base Address = 0x20200430h)
  9. 6Basic Tuning
    1. 6.1 System Configuration Parameters
      1. 6.1.1 Configuring System Parameters from GUI
      2. 6.1.2 Motor Resistance in Milliohms (mΩ)
      3. 6.1.3 Motor Inductance in Microhenries (μH)
      4. 6.1.4 Saliency of IPMSM Motor
      5. 6.1.5 Motor BEMF Constant
      6. 6.1.6 Base Voltage (V)
      7. 6.1.7 Base Current (A)
      8. 6.1.8 Maximum Motor Electrical Speed (Hz)
    2. 6.2 Control Configurations for Basic Motor Spinning
      1. 6.2.1 Basic Motor Startup
        1. 6.2.1.1 Disable ISD
        2. 6.2.1.2 Motor Start Option - Align
        3. 6.2.1.3 Motor Open Loop Ramp
        4. 6.2.1.4 Motor Open Loop Debug
      2. 6.2.2 Controller Configuration for spinning the Motor in Closed Loop
        1. 6.2.2.1 PI Controller Tuning for Closed Loop Speed Control
          1. 6.2.2.1.1 Reference
          2. 6.2.2.1.2 Speed Controller Tuning
        2. 6.2.2.2 Testing for Successful Startup Into Closed Loop
    3. 6.3 Fault Handling
      1. 6.3.1 Abnormal BEMF Fault [ABN_BEMF]
      2. 6.3.2 Monitoring Power Supply Voltage Fluctuations for Voltage Out of Bound Faults
      3. 6.3.3 No Motor Fault [NO_MTR]
  10. 7Advanced Tuning
    1. 7.1 Control Configurations Tuning
      1. 7.1.1  Control Mode of Operation
        1. 7.1.1.1 Closed Loop Speed Control Mode
        2. 7.1.1.2 Closed Loop Power Control Mode
        3. 7.1.1.3 Closed Loop Torque Control Mode
        4. 7.1.1.4 Voltage Control Mode
      2. 7.1.2  Initial Speed Detection of the Motor for Reliable Motor Resynchronization
      3. 7.1.3  Unidirectional Motor Drive Detecting Backward Spin
      4. 7.1.4  Preventing Back Spin of Rotor During Startup
        1. 7.1.4.1 Option 1: IPD
        2. 7.1.4.2 Option 2: Slow First Cycle
      5. 7.1.5  Gradual and Smooth Start up Motion
      6. 7.1.6  Faster Startup Timing
        1. 7.1.6.1 Option 1: Initial Position Detection (IPD)
        2. 7.1.6.2 Option 2: Slow First Cycle
      7. 7.1.7  Stopping Motor Quickly
      8. 7.1.8  Flux Weakening: Operating Motor at Speeds Higher than Rated Speed
      9. 7.1.9  Maximum Torque Per Ampere : Improve Efficiency of IPMSM Motors
      10. 7.1.10 Preventing Supply Voltage Overshoot During Motor Stop.
      11. 7.1.11 Protecting the Power Supply
      12. 7.1.12 FOC Bandwidth Selection
  11. 8Hardware Configurations
    1. 8.1 Direction Configuration
    2. 8.2 Brake Configuration
    3. 8.3 Main.h Definitions
      1. 8.3.1 Sense Amplifier Configuration
      2. 8.3.2 Driver Propagation Delay
      3. 8.3.3 Driver Min On Time
      4. 8.3.4 Current Shunt Configuration Selection
        1. 8.3.4.1 Three Shunt Configurations
        2. 8.3.4.2 Dual Shunt Configuration
        3. 8.3.4.3 Single Shunt Configuration
      5. 8.3.5 CSA Offset Scaling Factor Selection
    4. 8.4 Real Time Variable Tracking
  12. 9Revision History

2.4 Pin Configurations for ADC Currents

ADC configuration for three phase current sensing: The default pin configurations for ADC currents for three phase current sensing are shown in Table 2-12 and Table 2-5, depending on the DRV device used. The required connections are three ADC inputs connected to the three CSA outputs from the motor driver or external CSAs.

ADC0 and ADC1 are two simultaneous-sampling 4Msps analog-to-digital converters that are used to measure phase currents and voltages. ADC0 and ADC1 measure phase currents simultaneously and bus voltage sequentially depending on the rotor angle under normal motor run conditions.

An optional low-pass RC filter can be placed in series from the CSA outputs to the ADC inputs to filter out any high-frequency noise from the switching output signals for proper ADC sampling as shown in Figure 2-2.

CSA Output Filter Figure 2-2 CSA Output Filter

Choose a filtering frequency fc that it at least 10 times the PWM switching frequency (fPWM). Use Equation 1 to calculate fc based on the RC filter design.

Equation 1. f c = 1 2 πRC
Table 2-4 Pin Configurations for ADC Currents With Simultaneous Sampling in DRV8316
MSPM0 Pin Function DRV Connection DRV Function
A0_3 ADC0, channel 3 input SOA Phase A current sense output
A0_2 ADC0, channel 2 input SOB Phase B current sense output
A1_2 ADC1, channel 2 input SOB Phase B current sense output
A1_1 ADC1, channel 1 input SOC Phase C high side PWM input
Table 2-5 Pin Configurations for ADC Currents Without Simultaneous Sampling in DRV8323
MSPM0 Pin Function DRV Connection DRV Function
A1_2 ADC1, channel 2 input SOA Phase A current sense output
A0_3 ADC0, channel 2 input SOB Phase B current sense output
A1_3 ADC1, channel 3 input SOC Phase C high side PWM input
ADC configuration for single shunt current sensing: The ADC pin configurations for single shunt current sensing in DRV8329 is shown in ADC Pin Configuration for Single Shunt Current Sensing in DRV8329.

In single shunt current sensing ADC0 and ADC1 are used to sample the same shunt current at two different instances in a single PWM cycle to estimate the three phase currents. User need to configure both the ADCs to sample the same current sense output and configure the Memory '0' index for current sensing channels for appropriate FOC operation.

Table 2-6 ADC Pin Configuration for Single Shunt Current Sensing in DRV8329
MSPM0 Pin Function DRV Connection DRV Function
A0_3 ADC 0, Channel 3 Input SOX DC bus current sense
A1_2 ADC 1, Channel 2 Input SOX DC bus current sense