SLAZ161N October   2012  – May 2021 MSP430F2122

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RHB32
      2.      PW28
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL13
    3. 6.3  BCL16
    4. 6.4  CPU19
    5. 6.5  EEM20
    6. 6.6  FLASH19
    7. 6.7  FLASH24
    8. 6.8  FLASH27
    9. 6.9  FLASH36
    10. 6.10 PORT12
    11. 6.11 SYS15
    12. 6.12 TA12
    13. 6.13 TA16
    14. 6.14 TA21
    15. 6.15 TAB22
    16. 6.16 USCI20
    17. 6.17 USCI21
    18. 6.18 USCI22
    19. 6.19 USCI23
    20. 6.20 USCI24
    21. 6.21 USCI25
    22. 6.22 USCI26
    23. 6.23 USCI28
    24. 6.24 USCI30
    25. 6.25 USCI34
    26. 6.26 USCI35
    27. 6.27 USCI40
    28. 6.28 XOSC5
    29. 6.29 XOSC8
  7. 7Revision History

6.7 FLASH24

FLASH Module

Category

Functional

Function

Write or erase emergency exit can cause failures

Description

When a flash write or erase is abruptly terminated, the following flash accesses by the CPU may be unreliable resulting in erroneous code execution. The abrupt termination can be the result of one the following events:
1) The flash controller clock is configured to be sourced by an external crystal. An oscillator fault occurs thus stopping this clock abruptly.
or
2) The Emergency Exit bit (EMEX in FCTL3) when set forces a write or an erase operation to be terminated before normal completion.
or
3) The Enable Emergency Interrupt Exit bit (EEIEX in FCTL1) when set with GIE=1 can lead to an interrupt causing an emergency exit during a Flash operation.

Workaround

1) Use the internal DCO as the flash controller clock provided from MCLK or SMCLK.
or
2) After setting EMEX = 1, wait for a sufficient amount of time before Flash is accessed again.
or
3) No Workaround. Do not use EEIEX bit.