SLAZ162J
October 2012 – May 2021
MSP430F2131
1
Functional Advisories
2
Preprogrammed Software Advisories
3
Debug Only Advisories
4
Fixed by Compiler Advisories
5
Nomenclature, Package Symbolization, and Revision Identification
5.1
Device Nomenclature
5.2
Package Markings
DGV20
PW20
DW20
RGE24
5.3
Memory-Mapped Hardware Revision (TLV Structure)
6
Advisory Descriptions
6.1
BCL6
6.2
BCL8
6.3
BCL9
6.4
BCL10
6.5
BCL11
6.6
BCL12
6.7
BCL13
6.8
BCL14
6.9
BSL5
6.10
CPU4
6.11
CPU5
6.12
CPU6
6.13
CPU11
6.14
CPU12
6.15
CPU13
6.16
CPU14
6.17
CPU19
6.18
CPU45
6.19
EEM20
6.20
FLASH16
6.21
FLASH17
6.22
FLASH18
6.23
FLASH19
6.24
FLASH20
6.25
FLASH22
6.26
FLASH24
6.27
FLASH27
6.28
FLASH36
6.29
JTAG15
6.30
PORT8
6.31
PORT10
6.32
SYS15
6.33
TA12
6.34
TA16
6.35
TA21
6.36
TAB22
6.37
XOSC5
6.38
XOSC8
7
Revision History
RGE24
QFN (RGE), 24 Pin