SLAZ168O October 2012 – May 2021 MSP430F2272 , MSP430F2272-Q1
USCI Module
Functional
I2C Master Receiver with 10-bit slave addressing
Unexpected behavior of the USCI_B can occur when configured in I2C master receive mode with 10-bit slave addressing under the following conditions:
1) The USCI sends first byte of slave address, the slave sends an ACK and when second address byte is sent, the slave sends a NACK.
2) Master sends a repeat start condition (If UCTXSTT=1).
3) The first address byte following the repeated start is acknowledged.
However, the second address byte is not sent, instead the Master incorrectly starts to receive data and sets UCBxRXIFG=1.
Do not use repeated start condition instead set the stop condition UCTXSTP=1 in the NACK ISR prior to the following start condition (USTXSTT=1).