SLAZ178T October   2012  – May 2021 MSP430F2418

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      ZQW113
      2.      PM64
      3.      PN80
      4.      ZCA113
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC25
    2. 6.2  BCL12
    3. 6.3  BCL13
    4. 6.4  BCL15
    5. 6.5  CPU8
    6. 6.6  CPU16
    7. 6.7  CPU19
    8. 6.8  FLASH19
    9. 6.9  FLASH24
    10. 6.10 FLASH25
    11. 6.11 FLASH27
    12. 6.12 FLASH36
    13. 6.13 JTAG23
    14. 6.14 PORT10
    15. 6.15 PORT12
    16. 6.16 TA12
    17. 6.17 TA16
    18. 6.18 TA21
    19. 6.19 TAB22
    20. 6.20 TB2
    21. 6.21 TB16
    22. 6.22 TB24
    23. 6.23 USCI20
    24. 6.24 USCI21
    25. 6.25 USCI22
    26. 6.26 USCI23
    27. 6.27 USCI24
    28. 6.28 USCI25
    29. 6.29 USCI26
    30. 6.30 USCI27
    31. 6.31 USCI30
    32. 6.32 USCI34
    33. 6.33 USCI35
    34. 6.34 USCI40
    35. 6.35 XOSC5
    36. 6.36 XOSC8
  7. 7Revision History

6.24 USCI21

USCI Module

Category

Functional

Function

UART IrDA receive filter

Description

The IrDA receive filter can be used to filter pulses with length UCAIRRXFL configured in UCAxIRRCTL register. If UCIRRXFE is set the IrDA receive decoder may filter out pulses longer than the configured filter length depending on frequency of BRCLK. This is resulting in framing errors or corrupted data on the receiver side.

Workaround

Depending on the used baud rate and the configured filter length a maximum frequency for BRCLK needs to be set to avoid this issue:

For baud rates equal and higher than 115.000 the maximum allowed BRCLK frequency is equal to the max specified system frequency.


GUID-20201119-CA0I-SMS9-JCDV-0VFMD9QQBW6H-low.png





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