SLAZ182P October   2012  – May 2021 MSP430F248

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC25
    2. 6.2  BCL12
    3. 6.3  BCL13
    4. 6.4  BCL15
    5. 6.5  COMP2
    6. 6.6  CPU19
    7. 6.7  FLASH19
    8. 6.8  FLASH24
    9. 6.9  FLASH25
    10. 6.10 FLASH27
    11. 6.11 FLASH36
    12. 6.12 JTAG23
    13. 6.13 PORT11
    14. 6.14 PORT12
    15. 6.15 TA12
    16. 6.16 TA16
    17. 6.17 TA21
    18. 6.18 TAB22
    19. 6.19 TB2
    20. 6.20 TB16
    21. 6.21 TB24
    22. 6.22 USCI20
    23. 6.23 USCI21
    24. 6.24 USCI22
    25. 6.25 USCI23
    26. 6.26 USCI24
    27. 6.27 USCI25
    28. 6.28 USCI26
    29. 6.29 USCI28
    30. 6.30 USCI30
    31. 6.31 USCI34
    32. 6.32 USCI35
    33. 6.33 USCI40
    34. 6.34 XOSC5
    35. 6.35 XOSC6
    36. 6.36 XOSC8
  7. 7Revision History

6.8 FLASH24

FLASH Module

Category

Functional

Function

Write or erase emergency exit can cause failures

Description

When a flash write or erase is abruptly terminated, the following flash accesses by the CPU may be unreliable resulting in erroneous code execution. The abrupt termination can be the result of one the following events:
1) The flash controller clock is configured to be sourced by an external crystal. An oscillator fault occurs thus stopping this clock abruptly.
or
2) The Emergency Exit bit (EMEX in FCTL3) when set forces a write or an erase operation to be terminated before normal completion.
or
3) The Enable Emergency Interrupt Exit bit (EEIEX in FCTL1) when set with GIE=1 can lead to an interrupt causing an emergency exit during a Flash operation.

Workaround

1) Use the internal DCO as the flash controller clock provided from MCLK or SMCLK.
or
2) After setting EMEX = 1, wait for a sufficient amount of time before Flash is accessed again.
or
3) No Workaround. Do not use EEIEX bit.