SLAZ183P October 2012 – May 2021 MSP430F2481
FLASH Module
Functional
Marginal Read Mode is not functional
The control bits for marginal read mode contained in the FCTL4 register are automatically cleared by any flash access. This prevents the marginal read mode from being used.
It is possible to read out memory contents in marginal read mode if the indexed addressing mode X(Ry) is used to access the flash memory. In this case, the FCTL4 control bits are not cleared, and the marginal read mode works as expected. It is recommended to write the code for reading the flash memory contents in assembler as this allows full control over the used addressing mode. Note that certain assemblers may optimize an indexed addressing source operation of 0(Ry) to an indirect register mode @Ry operation, which will not work. The following is an example of reading the word memory location 0x4000 in marginal read mode, preventing a possible assembler optimization:
mov.w #0x4000,R15 ; Pointer to target address
dec.w R15 ; Decrement pointer
mov.w 1(R15),R12 ; Read memory contents at R15+1, store result in R12