SLAZ203G October   2012  – May 2021 MSP430F427A

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  CPU4
    2. 6.2  EEM20
    3. 6.3  ESP1
    4. 6.4  ESP4
    5. 6.5  FLL3
    6. 6.6  TA12
    7. 6.7  TA16
    8. 6.8  TA21
    9. 6.9  TAB22
    10. 6.10 US15
    11. 6.11 WDG2
  7. 7Revision History

6.7 TA16

TA Module

Category

Functional

Function

First increment of TAR erroneous when IDx > 00

Description

The first increment of TAR after any timer clear event (POR/TACLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK or TACLK). This is independent of the clock input divider settings (ID0, ID1). All following TAR increments are performed correctly with the selected IDx settings.

Workaround

None