SLAZ205H October   2012  – May 2021 MSP430F4351

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PZ100
      2.      PN80
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  CPU4
    2. 6.2  FLL3
    3. 6.3  PORT3
    4. 6.4  TA12
    5. 6.5  TA16
    6. 6.6  TA21
    7. 6.7  TAB22
    8. 6.8  TB2
    9. 6.9  TB14
    10. 6.10 TB16
    11. 6.11 TB24
    12. 6.12 US13
    13. 6.13 US14
    14. 6.14 US15
    15. 6.15 WDG2
    16. 6.16 XOSC5
    17. 6.17 XOSC9
  7. 7Revision History

6.10 TB16

TB Module

Category

Functional

Function

First increment of TBR erroneous when IDx > 00

Description

The first increment of TBR after any timer clear event (POR/TBCLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK, or TBCLK). This is independent of the clock input divider settings (ID0, ID1). All following TBR increments are performed correctly with the selected IDx settings.

Workaround

None