SLAZ206H October   2012  – May 2021 MSP430F436

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PZ100
      2.      PN80
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC9
    2. 6.2  ADC10
    3. 6.3  ADC13
    4. 6.4  ADC18
    5. 6.5  ADC25
    6. 6.6  CPU4
    7. 6.7  FLL3
    8. 6.8  PORT3
    9. 6.9  TA12
    10. 6.10 TA16
    11. 6.11 TA21
    12. 6.12 TAB22
    13. 6.13 TB2
    14. 6.14 TB14
    15. 6.15 TB16
    16. 6.16 TB24
    17. 6.17 US13
    18. 6.18 US14
    19. 6.19 US15
    20. 6.20 WDG2
    21. 6.21 XOSC5
    22. 6.22 XOSC9
  7. 7Revision History

6.15 TB16

TB Module

Category

Functional

Function

First increment of TBR erroneous when IDx > 00

Description

The first increment of TBR after any timer clear event (POR/TBCLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK, or TBCLK). This is independent of the clock input divider settings (ID0, ID1). All following TBR increments are performed correctly with the selected IDx settings.

Workaround

None