SLAZ233O October 2012 – May 2021 MSP430F47183
DMA Module
Functional
Clearing the DMAONFETCH bit may result in unpredictable code execution
If the DMA module is used with DMACTL1.DMAONFETCH = 0, DMA transfer requests occur immediately upon receiving the request. This may result in unpredictable code execution by the CPU.
Always ensure that DMACTL1.DMAONFETCH = 1. Note that this needs to be set explicitly by the user and is not the default setting for the DMACTL1 register.