SLAZ241O October   2012  – May 2021 MSP430F4783

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PZ100
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  COMP3
    2. 6.2  CPU19
    3. 6.3  CPU44
    4. 6.4  EEM20
    5. 6.5  FLASH19
    6. 6.6  FLASH24
    7. 6.7  FLASH25
    8. 6.8  FLASH27
    9. 6.9  FLASH36
    10. 6.10 FLL4
    11. 6.11 FLL5
    12. 6.12 FLL6
    13. 6.13 FLL7
    14. 6.14 JTAG23
    15. 6.15 LCDA5
    16. 6.16 LCDA7
    17. 6.17 SDA4
    18. 6.18 TA12
    19. 6.19 TA16
    20. 6.20 TA21
    21. 6.21 TAB22
    22. 6.22 TB2
    23. 6.23 TB16
    24. 6.24 TB24
    25. 6.25 USCI15
    26. 6.26 USCI19
    27. 6.27 USCI20
    28. 6.28 USCI21
    29. 6.29 USCI22
    30. 6.30 USCI23
    31. 6.31 USCI24
    32. 6.32 USCI25
    33. 6.33 USCI26
    34. 6.34 USCI28
    35. 6.35 USCI30
    36. 6.36 USCI34
    37. 6.37 USCI35
    38. 6.38 USCI40
    39. 6.39 XOSC5
    40. 6.40 XOSC8
    41. 6.41 XOSC9
  7. 7Revision History

6.8 FLASH27

FLASH Module

Category

Functional

Function

EEI feature can disrupt segment erase

Description

When a flash segment erase operation is active with EEI feature selected (EEI=1 in FLCTL1) and GIE=0, the following can occur:

An interrupt event causes the flash erase to be stopped, and the flash controller expects an RETI to resume the erase. Because GIE=0, interrupts are not serviced and RETI will never happen.

Workaround

1) Do not set bit EEI=1 when GIE = 0.
or,
2) Force an RETI instruction during the erase operation during the check for BUSY=1 (FCLTL3).

Sample code:

        MOV R5, 0(R5) ; Dummy write, erase segment
LOOP: BIT #BUSY, &FCTL3 ; test busy bit
       JMP SUB_RETI ; Force RETI instruction
        JNZ LOOP ; loop while BUSY=1

SUB_RETI: PUSH SR
          RETI