SLAZ269AB October 2012 – May 2021 MSP430F5325
noUSB Module
Functional
LDOI detection may fail after power-up
In rare cases, internal 3.3V LDO enabled MSP430 devices may experience a failure in the bandgap that aids in detecting the presence of sufficient LDO input voltage on the LDOI pin. Two primary effects of this are:
1. The LDOBGVBV bit fails to show the presence of a valid voltage on the LDOI pin.
2. The integrated 3.3V LDO fails to start.
This error state can be "reset" by clearing all the bits in the LDOPWRCTL register, which (among other actions) disables the internal 3.3V LDO regulator. They can then be set again normally, and the device will function properly.
However, if the integrated 3.3V LDO (the output of the LDOO pin) is used to power the device DVCC pin, and if the rare bandgap error occurs, the CPU will fail to power up because the internal 3.3-V LDO fails to start. The problem might be resolved by cycling power to the LDOI pin. The bandgap failure is also known to occur more often with slow DVCC ramps (>200ms); for example, when there is excessive capacitance on the DVCC pin, in excess of what the LDO specification allows. However, the only sure way to prevent the problem from occurring is to avoid making DVCC power reliant on LDOO.