SLAZ300AD October   2012  – August 2021 MSP430F5509

 

  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
    1.     6
    2.     7
      1.      8
      2.      9
      3.      10
      4.      11
    3.     12
  6.   13
    1.     14
    2.     15
    3.     16
    4.     17
    5.     18
    6.     19
    7.     20
    8.     21
    9.     22
    10.     23
    11.     24
    12.     25
    13.     26
    14.     27
    15.     28
    16.     29
    17.     30
    18.     31
    19.     32
    20.     33
    21.     34
    22.     35
    23.     36
    24.     37
    25.     38
    26.     39
    27.     40
    28.     41
    29.     42
    30.     43
    31.     44
    32.     45
    33.     46
    34.     47
    35.     48
    36.     49
    37.     50
    38.     51
    39.     52
    40.     53
    41.     54
    42.     55
    43.     56
    44.     57
    45.     58
    46.     59
    47.     60
    48.     61
    49.     62
    50.     63
    51.     64
    52.     65
    53.     66
    54.     67
    55.     68
    56.     69
    57.     70
    58.     71
    59.     72
    60.     73
    61.     74
    62.     75
    63.     76
    64.     77
    65.     78
    66.     79
    67.     80
  7.   81

ADC69

ADC Module

Category

Functional

Function

ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1.

Description

When SMCLK is used as the clock source for the ADC (ADC12CTL1.ADC12SSELx = 11) and CSCTL4.SMCLKOFF = 1, the ADC will stop operating if the ADC clock source is changed by user software (e.g. in the ISR) from SMCLK to a different clock source. This issue appears only for the ADC12CTL1.ADC12DIVx settings /3/5/7. The hang state can be recovered by PUC/POR/BOR/Power cycle.

Workaround

1. Set CSCTL4.SMCLKOFF = 0 before switch ADC clock source.

OR

2. Only use ADC12CTL1.ADC12DIVx as /1, /2, /4, /6, /8