SLAZ337AA December   2012  – September 2021 MSP430F6659

 

  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
    1.     6
    2.     7
      1.      8
      2.      9
    3.     10
  6.   11
    1.     12
    2.     13
    3.     14
    4.     15
    5.     16
    6.     17
    7.     18
    8.     19
    9.     20
    10.     21
    11.     22
    12.     23
    13.     24
    14.     25
    15.     26
    16.     27
    17.     28
    18.     29
    19.     30
    20.     31
    21.     32
    22.     33
    23.     34
    24.     35
    25.     36
    26.     37
    27.     38
    28.     39
    29.     40
    30.     41
    31.     42
    32.     43
    33.     44
    34.     45
    35.     46
    36.     47
    37.     48
    38.     49
    39.     50
    40.     51
    41.     52
    42.     53
    43.     54
  7.   55

6.13 DMA4

DMA Module

Category

Functional

Function

Corrupted write access to 20-bit DMA registers

Description

When a 20-bit wide write to a DMA address register (DMAxSA or DMAxDA) is interrupted by a DMA transfer, the register contents may be unpredictable.

Workaround

1. Design the application to guarantee that no DMA access interrupts 20-bit wide accesses to the DMA address registers.

OR

2. When accessing the DMA address registers, enable the Read Modify Write disable bit (DMARMWDIS = 1) or temporarily disable all active DMA channels (DMAEN = 0).

OR

3. Use word access for accessing the DMA address registers. Note that this limits the values that can be written to the address registers to 16-bit values (lower 64K of Flash).