SLAZ342AF October   2012  – May 2021 MSP430F6725

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PZ100
      2.      PN80
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC39
    2. 6.2  ADC42
    3. 6.3  ADC69
    4. 6.4  AUXPMM1
    5. 6.5  AUXPMM2
    6. 6.6  BSL7
    7. 6.7  BSL14
    8. 6.8  CPU21
    9. 6.9  CPU22
    10. 6.10 CPU36
    11. 6.11 CPU40
    12. 6.12 CPU46
    13. 6.13 CPU47
    14. 6.14 DMA4
    15. 6.15 DMA7
    16. 6.16 DMA9
    17. 6.17 DMA10
    18. 6.18 EEM8
    19. 6.19 EEM17
    20. 6.20 EEM19
    21. 6.21 EEM23
    22. 6.22 JTAG26
    23. 6.23 JTAG27
    24. 6.24 LCDB5
    25. 6.25 LCDB6
    26. 6.26 PMM7
    27. 6.27 PMM11
    28. 6.28 PMM12
    29. 6.29 PMM14
    30. 6.30 PMM15
    31. 6.31 PMM18
    32. 6.32 PMM20
    33. 6.33 PMM26
    34. 6.34 PORT15
    35. 6.35 PORT19
    36. 6.36 SD3
    37. 6.37 UCS11
    38. 6.38 USCI36
    39. 6.39 USCI37
    40. 6.40 USCI41
    41. 6.41 USCI42
    42. 6.42 USCI47
    43. 6.43 USCI50
  7. 7Revision History

6.3 ADC69

ADC Module

Category

Functional

Function

ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1.

Description

When SMCLK is used as the clock source for the ADC (ADC12CTL1.ADC12SSELx = 11) and CSCTL4.SMCLKOFF = 1, the ADC will stop operating if the ADC clock source is changed by user software (e.g. in the ISR) from SMCLK to a different clock source. This issue appears only for the ADC12CTL1.ADC12DIVx settings /3/5/7. The hang state can be recovered by PUC/POR/BOR/Power cycle.

Workaround

1. Set CSCTL4.SMCLKOFF = 0 before switch ADC clock source.

OR

2. Only use ADC12CTL1.ADC12DIVx as /1, /2, /4, /6, /8