SLAZ357J October 2012 – May 2021 MSP430FE427
SD Module
Functional
Reduced SINAD performance if SD16 clock source is greater than 6 MHz
If the frequency of the SD16 input clock source is greater than 6 MHz, the performance of the SD16 may be degraded due to noise influencing the analog measurements under reduced SINAD.
Writing 0x48 to memory location 0xBF configures the SD16 for optimized performance at input clock frequencies greater than 6 MHz.
Include the following code:
*(unsigned char*) 0xBF=0x48; // Write value 0x48 to memory address 0xBF