SLAZ363L October   2012  – May 2021 MSP430FG437

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PN80
      2.      ZCA113
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC18
    2. 6.2  ADC25
    3. 6.3  CPU4
    4. 6.4  DAC4
    5. 6.5  EEM20
    6. 6.6  FLL3
    7. 6.7  OA1
    8. 6.8  TA12
    9. 6.9  TA16
    10. 6.10 TA21
    11. 6.11 TAB22
    12. 6.12 TB2
    13. 6.13 TB16
    14. 6.14 TB24
    15. 6.15 US14
    16. 6.16 US15
    17. 6.17 WDG2
    18. 6.18 XOSC5
    19. 6.19 XOSC9
  7. 7Revision History

6.13 TB16

TB Module

Category

Functional

Function

First increment of TBR erroneous when IDx > 00

Description

The first increment of TBR after any timer clear event (POR/TBCLR) happens immediately following the first positive edge of the selected clock source (INCLK, SMCLK, ACLK, or TBCLK). This is independent of the clock input divider settings (ID0, ID1). All following TBR increments are performed correctly with the selected IDx settings.

Workaround

None