SLAZ403J October   2012  – May 2021 MSP430G2112

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PW14
      2.      N20
      3.      PW20
      4.      RSA16
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  BCL12
    2. 6.2  BCL14
    3. 6.3  CPU4
    4. 6.4  EEM20
    5. 6.5  SYS15
    6. 6.6  TA12
    7. 6.7  TA16
    8. 6.8  TA21
    9. 6.9  TAB22
    10. 6.10 USI4
    11. 6.11 USI5
    12. 6.12 XOSC5
  7. 7Revision History

Fixed by Compiler Advisories

Advisories that are resolved by compiler workaround. Refer to each advisory for the IDE and compiler versions with a workaround.

✓ The check mark indicates that the issue is present in the specified revision.

Errata NumberRev BRev A
CPU4

Refer to the following MSP430 compiler documentation for more details about the CPU bugs workarounds.

TI MSP430 Compiler Tools (Code Composer Studio IDE)

MSP430 GNU Compiler (MSP430-GCC)

IAR Embedded Workbench