SLAZ584V January   2014  – May 2021 MSP430F67671A

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PEU128
      2.      PZ100
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC39
    2. 6.2  ADC42
    3. 6.3  ADC69
    4. 6.4  AUXPMM2
    5. 6.5  BSL7
    6. 6.6  BSL14
    7. 6.7  COMP10
    8. 6.8  CPU21
    9. 6.9  CPU22
    10. 6.10 CPU36
    11. 6.11 CPU37
    12. 6.12 CPU40
    13. 6.13 CPU46
    14. 6.14 CPU47
    15. 6.15 DMA4
    16. 6.16 DMA7
    17. 6.17 DMA9
    18. 6.18 DMA10
    19. 6.19 EEM17
    20. 6.20 EEM19
    21. 6.21 EEM23
    22. 6.22 JTAG26
    23. 6.23 JTAG27
    24. 6.24 LCDB6
    25. 6.25 PMM11
    26. 6.26 PMM12
    27. 6.27 PMM14
    28. 6.28 PMM15
    29. 6.29 PMM18
    30. 6.30 PMM20
    31. 6.31 PMM26
    32. 6.32 PORT15
    33. 6.33 PORT19
    34. 6.34 PORT26
    35. 6.35 SD3
    36. 6.36 SYS16
    37. 6.37 UCS11
    38. 6.38 USCI36
    39. 6.39 USCI37
    40. 6.40 USCI41
    41. 6.41 USCI42
    42. 6.42 USCI47
    43. 6.43 USCI50
  7. 7Revision History

6.3 ADC69

ADC Module

Category

Functional

Function

ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1.

Description

When SMCLK is used as the clock source for the ADC (ADC12CTL1.ADC12SSELx = 11) and CSCTL4.SMCLKOFF = 1, the ADC will stop operating if the ADC clock source is changed by user software (e.g. in the ISR) from SMCLK to a different clock source. This issue appears only for the ADC12CTL1.ADC12DIVx settings /3/5/7. The hang state can be recovered by PUC/POR/BOR/Power cycle.

Workaround

1. Set CSCTL4.SMCLKOFF = 0 before switch ADC clock source.

OR

2. Only use ADC12CTL1.ADC12DIVx as /1, /2, /4, /6, /8