SLAZ617AA August 2014 – August 2021 MSP430FR6927
ADC Module
Functional
ADC stops operating if ADC clock source is changed from SMCLK to another source while SMCLKOFF = 1.
When SMCLK is used as the clock source for the ADC (ADC12CTL1.ADC12SSELx = 11) and CSCTL4.SMCLKOFF = 1, the ADC will stop operating if the ADC clock source is changed by user software (e.g. in the ISR) from SMCLK to a different clock source. This issue appears only for the ADC12CTL1.ADC12DIVx settings /3/5/7. The hang state can be recovered by PUC/POR/BOR/Power cycle.
1. Set CSCTL4.SMCLKOFF = 0 before switch ADC clock source.
OR
2. Only use ADC12CTL1.ADC12DIVx as /1, /2, /4, /6, /8