SLAZ620AA August 2014 – August 2021 MSP430FR6977
ADC Module
Functional
DMA does not trigger at the end of an ADC12 sequence of channels
The DMA transfer is triggered at the end of every ADC conversion when the ADC is configured to convert in a sequence of channels (ADC12CTL1.CONSEQ = 1 or 3.) This causes the DMA transfer to trigger prematurely after each ADC conversion instead of triggering only at the end of the conversion sequence.
Design the application to expect the DMA trigger at the end of every ADC conversion. For example, if a block transfer at the end of the sequence is originally desired, configure the DMA in single transfer mode with size = length of the sequence. The DMA transfer occurs at each conversion, but the DMA interrupt will still occur at the end of the sequence.