SLAZ627W September   2014  – August 2021 MSP430FR6972

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      PM64
      2.      RGC64
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC38
    2. 6.2  ADC42
    3. 6.3  ADC43
    4. 6.4  ADC64
    5. 6.5  ADC66
    6. 6.6  ADC67
    7. 6.7  ADC69
    8. 6.8  ADC70
    9. 6.9  ADC71
    10. 6.10 AES1
    11. 6.11 COMP7
    12. 6.12 COMP10
    13. 6.13 CPU21
    14. 6.14 CPU22
    15. 6.15 CPU40
    16. 6.16 CPU46
    17. 6.17 CPU47
    18. 6.18 CS7
    19. 6.19 CS12
    20. 6.20 DMA7
    21. 6.21 EEM19
    22. 6.22 EEM23
    23. 6.23 EEM27
    24. 6.24 EEM30
    25. 6.25 EEM31
    26. 6.26 GC4
    27. 6.27 GC5
    28. 6.28 JTAG27
    29. 6.29 PMM24
    30. 6.30 PMM27
    31. 6.31 PMM31
    32. 6.32 PMM32
    33. 6.33 PORT28
    34. 6.34 REF9
    35. 6.35 RTC10
    36. 6.36 RTC12
    37. 6.37 TB25
    38. 6.38 USCI41
    39. 6.39 USCI42
    40. 6.40 USCI45
    41. 6.41 USCI47
    42. 6.42 USCI50
  7. 7Revision History

6.26 GC4

GC Module

Category

Functional

Function

Unexpected PUC is triggered

Description

During execution from FRAM a non-existent uncorrectable bit error can be detected and trigger a PUC if the uncorrectable bit error detection flag is set (GCCTL0.UBDRSTEN = 1). This behavior appears only if:

(1) MCLK is sourced from DCO frequency of 16 MHz

OR

(2) MCLK is sourced by external high frequency clock above 12 MHz at pin HFXIN

OR

(3) MCLK is sourced by High-Frequency crystals (HFXT) above 12 MHz.  

This PUC will not be recognized by the SYSRSTIV register (SYSRSTIV = 0x00).
A PUC RESET will be executed with not defined reset source.
Also the corresponding bit error detection flag is not set  (GCCTL1.UBDIFG = 0).

Workaround

1. Check the reset source for SYSRSTIV = 0 and ignore the reset.

OR

2. Set GCCTL0.UBDRSTEN = 0 to prevent unexpected PUC.

OR

3. Set the MCLK to maximum 12MHz to leverage the uncorrectable bit error PUC feature.