SLAZ660S June   2015  – May 2021 MSP430FR2633

 

  1. 1Functional Advisories
  2. 2Preprogrammed Software Advisories
  3. 3Debug Only Advisories
  4. 4Fixed by Compiler Advisories
  5. 5Nomenclature, Package Symbolization, and Revision Identification
    1. 5.1 Device Nomenclature
    2. 5.2 Package Markings
      1.      RHB32
      2.      YQW24
      3.      DA32
    3. 5.3 Memory-Mapped Hardware Revision (TLV Structure)
  6. 6Advisory Descriptions
    1. 6.1  ADC50
    2. 6.2  ADC63
    3. 6.3  BSL18
    4. 6.4  CPU21
    5. 6.5  CPU22
    6. 6.6  CPU40
    7. 6.7  CPU46
    8. 6.8  CS13
    9. 6.9  EEM23
    10. 6.10 GC4
    11. 6.11 GC5
    12. 6.12 PMM32
    13. 6.13 PORT28
    14. 6.14 RTC15
    15. 6.15 USCI42
    16. 6.16 USCI45
    17. 6.17 USCI47
    18. 6.18 USCI50
  7. 7Revision History

6.11 GC5

GC Module

Category

Functional

Function

Nonexistent FRAM failures can be detected after wake-up from LPM 1/2/3/4

Description

The FRAM bit error detection may indicate bit errors, even the memory has no failure, after wakeup from LPM1/2/3/4.
Based on the setting inside the FRAM controller registers (GCCTL0), following behaviors can appear.

1. Unexpected PUC for an uncorrectable FRAM error can be triggered and causing the corresponding value in the SYSRSTIV register.
This happens only if GCCTL0.UBDRSTEN =1.

2. Unexpected NMI for an uncorrectable FRAM error can be triggered and causing the corresponding value in the SYSSNIV register.
This happens only if the GCCTL0.UBDIE = 1.

3. Unexpected NMI for a correctable FRAM error can be triggered and causing the corresponding value in the SYSSNIV register.
This happens only if the GCCTL0.CBDIE =1.

Workaround

1. Disable PUC (GCCTL0.UBDRSTEN=0), UBDIE and CBDIE interrupts (GCCTL0.UBDIE=0 and GCCTL0.CBDIE=0) prior to entering LPM 1/2/3/4.  

2. After LPM wake up, clear GCCTL1.UBDIFG and GCCTL1.CBDIFG, and then reinitialize the GCCTL0 register after the first valid FRAM access has been completed. For the valid FRAM access the user has to consider possible cache hits which depends on implementation.