SLAZ686L February   2017  – August 2021 MSP430FR5962

 

  1.   1
  2.   2
  3.   3
  4.   4
  5.   5
    1.     6
    2.     7
      1.      8
      2.      9
      3.      10
      4.      11
    3.     12
  6.   13
    1.     14
    2.     15
    3.     16
    4.     17
    5.     18
    6.     19
    7.     20
    8.     21
    9.     22
    10.     23
    11.     24
    12.     25
    13.     26
    14.     27
    15.     28
    16.     29
    17.     30
    18.     31
    19.     32
    20.     33
  7.   34

6.2 ADC65

ADC Module

Category

Functional

Function

ADC12_B clock stays on between conversions in sequence-of-channels or repeated sequence-of-channels mode

Description

When using the ADC in sequence-of-channels or repeat-sequence-of-channels mode (ADC12CONSEQx = 01 or 11), the ADC12_B always requests the ADC clock even between conversions. In this scenario, although the device may still enter LPM0, LPM1, LPM2 or LPM3, the selected ADC12_B clock source will always remain on, resulting in increased current consumption between ADC conversions.

Workaround

To avoid the additional current consumption impact, different options will be needed depending on use case:

1. Configure ADC to Repeated-Single-Channel mode (ADC12CONSEQx = 10). Use the DMA or software to change the selected ADC12INCHx between conversions. With this option, the timing between conversions of different channels remains the same as normal ADC12 usage.

OR

2. Configure ADC to Sequence-of-Channels mode (ADC12CONSEQx = 01) with sequence of channels in Multiple Sample and Convert mode (ADC12CTL0.ADC12MSC = 1), then toggle the ADC12ENC bit by DMA or software after completing of each conversion sequence. With this option, the conversions of each channel in the sequence will happen immediately after the previous channel instead of waiting for the next trigger. This needs to be considered if timing between the sampling of different channels in the sequence matters for the application.