SLDU019B
December 2015 – March 2016
PGA450-Q1
PGA450Q1EVM-S User's Guide and TIDA-00151 UART Demo Instructional
Trademarks
1
Introduction
2
Setup and Operation
2.1
Input and Output Connectors
2.2
Basic Operation
2.2.1
Programming the PGA450-Q1 DEVRAM or OTP Memory
2.2.2
Programming the PGA450-Q1 EEPROM
2.2.3
Testing the UART Connection With the TI GER Board
2.3
UART Command Listing
3
Software
3.1
IDE Output File Configuration
3.1.1
Setup for DEVRAM Output File
3.1.2
Setup for OTP Output File
3.2
Interface Descriptions
3.2.1
UART Interface
3.2.2
LIN Interface
3.2.3
Serial-Peripheral Interface
4
Schematic, Bill of Materials, and Layout
4.1
Schematic
4.2
Bill of Materials
4.2.1
BOM
4.3
Board Layout and Component Placement
5
References
Revision History
4.1
Schematic
Figure 8
sows the schematic of the PGA450Q1EVM-S.
Figure 8.
PGA450Q1EVM-S Schematic