SLFS083A July 2024 – October 2024 TLC3555-Q1
PRODMIX
The clock input must have VOL and VOH levels that are less than and greater than 1/3 VDD, respectively. Clock input VOL time must be less than minimum output high time; therefore, a high (positive) duty cycle clock is recommended. The minimum recommended modulation voltage is 1V, as a lower CONT voltage can increase threshold comparator propagation delay and storage time. The application must be tolerant of a nonlinear transfer function; the relationship between modulation input and pulse duration is not linear because the capacitor charge is RC-based with an negative exponential curve.
The modulating signal can be directly or capacitively coupled to CONT. For direct coupling, consider the effects of modulation source voltage and impedance on the bias of the timer.