SLLA519 November   2020 ISO1540-Q1 , ISO1541-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
    1. 2.1 8-D Package
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)
    1. 4.1 ISO1541-Q1 in 8-D Package
    2. 4.2 ISO1540-Q1 in 8-D Package

4.2 ISO1540-Q1 in 8-D Package

Figure 4-2 shows the ISO1540-Q1 pin diagram for the 8-D package. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the ISO1541-Q1 data sheet.

GUID-20200914-CA0I-7MCF-GCZK-DKJJ62SQ876K-low.gif Figure 4-2 Pin Diagram (8-D Package)
Table 4-6 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
VCC11No power to the device on side-1. Observe that the absolute maximum ratings for SDA1/SCL1 are met; otherwise device damage may be plausible.A
SDA12SDA1 stuck to low, makes SDA2 also low. Communication corrupted.B
SCL13SCL1 stuck to low, makes SCL2 also low. Communication corrupted.B
GND14Device continues to function as expected. Normal operation.D
GND25Device continues to function as expected. Normal operation.D
SCL26SCL2 stuck low, makes SCL1 also low. Communication corrupted.B
SDA27SDA2 stuck low, makes SDA1 also low. Communication corrupted.B
VCC28No power to the device on side-2. Observe that the absolute maximum ratings for SDA2/SCL2 are met; otherwise device damage may be plausible.A
Table 4-7 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
VCC11Operation undetermined. Either device is unpowered and SDA2/SCL2 are pulled to logic high to external pull-up resistors or through internal ESD diode on SDA1/SCL1 pin, device can power up if SDA1/SCL1 are logic high. If abs max rating of SDA1/SCL1 is not observed, device damage plausible.A
SDA12No data communication possible.B
SCL13Clock missing, so no communication possible.B
GND14Device unpowered on side1. SDA2/SCL2 are logic high via external pull-up resistors.B
GND25Device unpowered on side2. SDA1/SCL1 are logic high via external pull-up resistors.B
SCL26Clock missing, so no communication possible.B
SDA27No data communication possible. B
VCC28Operation undetermined. Either device is unpowered and SDA1/SCL1 are pulled to logic high to external pull-up resistors or through internal ESD diode on SDA2/SCL2 pin, device can power up if SDA2/SCL2 are logic high. If abs max rating of SDA2/SCL2 is not observed, device damage plausible.A
Table 4-8 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
VCC11SDA1SDA1 stuck high. Communication corrupted. If SDA2 is driven logic low for extended duration, SDA1 stuck high creates short between supply and ground, possible device damage.A
SDA12SCL1I2C Communication corrupted.B
SCL13GND1SCL1 stuck to low, makes SCL2 also low. Communication corrupted.B
GND14SCL1Already considered in above row.B
GND25SCL2SCL2 stuck low. Data communication corrupted. B
SCL26SDA2I2C Communication corrupted.B
SDA27VCC2SDA2 stuck high. Communication corrupted. If SDA1 is driven logic low for extended duration, SDA2 stuck high creates short between supply and ground, possible device damage.A
VCC28SDA2Already considered in above row.A
Table 4-9 Pin FMA for Device Pins Short-Circuited to supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
VCC11No effect. Normal operation.D
SDA12SDA1 stuck high. Communication corrupted. If SDA2 is driven logic low for extended duration, SDA1 stuck high creates short between supply and ground, possible device damage.A
SCL13SCL1 stuck high does not allow clock transitions to happen. I2C communication corrupted.B
GND14Device side-1 unpowered. Observe that the absolute maximum ratings for SCL1/SDA1 pins of the device are met, otherwise device damage may be plausible.A
GND25Device side-2 unpowered. Observe that the absolute maximum ratings for SCL2/SDA2 pins of the device are met, otherwise device damage may be plausible.A
SCL26SCL2 stuck high. If SCL1 is driven low for extended duration, SCL2 stuck high creates a path for high current from supply to ground with possible device damage.A
SDA27SDA2 stuck high. Communication corrupted. If SDA1 is driven logic low for extended duration, SDA2 stuck high creates short between supply and ground, possible device damage.A
VCC28No effect. Normal operation.D