SLLA530 December   2020 TCAN1145-Q1

 

  1.   Trademarks
  2. 1Overview
  3. 2Functional Safety Failure In Time (FIT) Rates
  4. 3Failure Mode Distribution (FMD)
  5. 4Pin Failure Mode Analysis (Pin FMA)

Pin Failure Mode Analysis (Pin FMA)

This section provides a Failure Mode Analysis (FMA) for the pins of the TCAN1145-Q1. The failure modes covered in this document include the typical pin-by-pin failure scenarios:

Table 4-2 through Table 4-7 also indicate how these pin conditions can affect the device as per the failure effects classification in Table 4-1.

Table 4-1 TI Classification of Failure Effects
ClassFailure Effects
APotential device damage that affects functionality
BNo device damage, but loss of functionality
CNo device damage, but performance degradation
DNo device damage, no impact to functionality or performance

Figure 4-1 shows the TCAN114x-Q1 pin diagrams. For TCAN1145-Q1 pin 6 only supports SDO output and pin 7 only supports INH output. For a detailed description of the device pins please refer to the Pin Configuration and Functions section in the TCAN114x-Q1 data sheet.

GUID-20200917-CA0I-D9ZK-VTSJ-X0DD5CDWJMBF-low.gifFigure 4-1 14-pin SOIC (D) Pin Diagram, Top View
GUID-79E9E0E0-CAF5-4D21-995E-9A24B66D7AA4-low.gifFigure 4-3 14-pin SOT (DYY) Pin Diagram, Top View.
GUID-20200917-CA0I-TW06-M2HP-N0SMPDRF2RNB-low.gifFigure 4-2 14-pin VSON (DMT) Pin Diagram, Top View.

Following are the assumptions of use and the device configuration assumed for the pin FMA in this section:

  • All conditions are within recommended operating conditions
  • VSUP = see recommended conditions in device data sheet
  • VCC = 4.5 V to 5.5 V
  • VIO = 1.71 V to 5.5 V
Table 4-2 Pin FMA for Device Pins Short-Circuited to Ground
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD1Device will enter dominant time out mode. Unable to transmit data from processor to CAN busB
GND2NoneD
VCC3Transceiver unpowered, high ICC currentB
RXD4Transceiver output biased dominant. Unable to send data from CAN bus to processorB
VIO5Digital pins unpowered, high IIO current. No communiation between device and processor possibleB
SDO6SDO biased low, no SPI read capability from device to processorB
INH7INH will not function, excessive VSUP current and not able to perform power enable functionB
SCLK8SCLK biased low, no SPI read/write capability between device and processorB
WAKE9Will not be able to transition to high, which will not allow device to recognize a local wake up functionB
VSUP10Device unpowered, high ISUP current.B
SDI11SDI biased low, no SPI write capability from processor to deviceB
CANL12VO(REC) spec violated. Degrade EMC performanceB
CANH13Device cannot drive dominant to the bus, no communication possibleB
nCS14nCS biased low, SPI always active D
Note:

The VSON (DMT) package includes a thermal pad that may or may not be soldered to GND.

Table 4-3 Pin FMA for Device Pins Open-Circuited
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD1Unable to transmit data from processor to CAN busB
GND2Device is unpoweredB
VCC3Transceiver unpoweredB
RXD4Unable to send data from CAN bus to processorB
VIO5Digital pins unpowered. No communication between device and processor possibleB
SDO6SDO internally biased to VIO. No SPI read capability from device to processorB
INH7INH will not able to perform system power enable functionB
SCLK8SCLK internally biased to VIO. No SPI read/write capability between device and processorB
WAKE9Will not be able to transition, which will not allow device to recognize a local wake up functionB
VSUP10Device unpoweredB
SDI11SDI internally biased to VIO. No SPI write capability from processor to deviceB
CANL12Device cannot drive dominant to the bus, unable to communicateB
CANH13Device cannot drive dominant to the bus, unable to communicateB
nCS14nCS internally biased to VIO. No SPI read/write capability between device and processorB
Note: The VSON (DMT) package includes a thermal pad that may or may not be soldered to GND
Table 4-4 Pin FMA for Device Pins Short-Circuited to Adjacent Pin
Pin NamePin No.Shorted toDescription of Potential Failure Effect(s)Failure Effect Class
TXD1GNDDevice will enter dominant time out mode. Unable to transmit data from processor to CAN busB
GND2VCCDevice unpowered, high ICC currentB
VCC3RXDRXD output biased recessive, unable to communicate bus data to processor. B
RXD4VIORXD output biased recessive, unable to communicate bus data to processor. B
VIO5SDONo SPI read capability from device to processorB
SDO6INHSDO pin will be damaged due to high voltageA
SCLK8WAKESCLK pin may be damaged if WAKE pin connected to VSUPA
WAKE9VSUPWill not be able to transition to low, which will not allow device to recognize a local wake up functionB
VSUP10SDISDI pin will be damaged and no SPI write communication from processor to deviceA
SDI11CANLSPI SDI bus line will toggle on and off based upon CAN traffic. During SPI communication CANL may toggle due to SDI trafficB
CANL12CANHBus biased recessive, not communication possible. IOS current may be reached on CANH/CANLB
CANH13nCSDuring SPI communication CANH may be biased dominantB
Note: The VSON (DMT) package includes a thermal pad .

There is a chance the thermal pad if soldered down could short to any pin on device. What the thermal pad is soldered to determines the behavior.

Example: if soldered to a ground plane then the adjacent pins would behave as if shorted to ground.

Table 4-5 Pin FMA for Device Pins Short-Circuited to VSUP supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD1Absolute maximum violation, pin may be damaged. Unable to communicate from processor to CAN busA
GND2Device unpowered, high ISUP current, may damage deviceA
VCC3Absolute maximum violation, pin may be damaged. Unable to communicate from processor to CAN busA
RXD4Absolute maximum violation, pin may be damaged. Unable to communicate from CAN bus to processorA
VIO5Absolute maximum violation, pin may be damaged A
SDO6Absolute maximum violation, pin may be damaged. No SPI read capability from device to processorA
INH7INH will be biased on and will not be able to turn offB
SCLK8Absolute maximum violation, pin may be damaged. No SPI read/write capability between device and processorA
WAKE9Will not be able to transition which will not allow device to recognize a local wake up functionB
VSUP10NoneD
SDI11Absolute maximum violation, pin may be damaged, no SPI write capability from processor to deviceA
CANL12RXD biased recessive, no communication from CAN bus to processor possible. IOS current may be reachedB
CANH13VO(REC) spec violated. May degrade EMC performanceC
nCS14Absolute maximum violation, transceiver may be damaged. No SPI read/write capability between device and processorA
Note: The VSON (DMT) package includes a thermal pad
Table 4-6 Pin FMA for Device Pins Short-Circuited to VCC supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD1TXD biased recessive. Unable to transmit data from processor to CAN bus. Processor may be damaged if VCC > VIOB
GND2Device unpowered, high ICC currentB
VCC3NoneD
RXD4Transceiver output biased recessive. Unable to send data from CAN bus to processor. Processor may be damaged if VCC > VIOB
VIO5IO pins will operate as 5V input/outputs. Processor may be damaged if VCC > VIOC
SDO6No SPI read capability from device to processor. Processor may be damaged if VCC > VIOB
INH7May damage transceiver as absolute maximum voltage on VCC may be exceededA
SCLK8No SPI read/write capability between device and processor. Processor may be damaged if VCC > VIOB
WAKE9May damage transceiver as absolute maximum voltage on VCC may be exceeded. May not be able to transition states which will not allow device to recognize a local wake up functionA
VSUP10Absolute maximum violation on VCC, transceiver may be damaged. Unable to communicate from processor to CAN busA
SDI11No SPI write capability from processor to device. Processor may be damaged if VCC > VIOB
CANL12RXD always recessive, no communication possible. IOS current may be reachedB
CANH13VO(REC) spec violated, degraded EMC performance.C
nCS14No SPI read/write capability between device and processor. Processor may be damaged if VCC > VIOB
Note: The VSON (DMT) package includes a thermal pad
Table 4-7 Pin FMA for Device Pins Short-Circuited to VIO supply
Pin NamePin No.Description of Potential Failure Effect(s)Failure Effect Class
TXD1TXD biased recessive. Unable to transmit data from processor to CAN busB
GND2Device unpowered, high IIO currentB
VCC3IO pins will operate as 5V input/outputs. Processor may be damaged if VCC > VIO.C
RXD4Transceiver output biased recessive. Unable to send data from CAN bus to processorB
VIO5NoneD
SDO6No SPI read capability from device to processorB
INH7May damage transceiver as absolute maximum voltage on VIO may be exceededA
SCLK8SCLK biased high. No SPI read/write capability between device and processorB
WAKE9May damage transceiver as absolute maximum voltage on VIO may be exceeded. May not be able to transition states which will not allow device to recognize a local wake up functionA
VSUP10Absolute maximum violation on VIO pin, transceiver may be damagedA
SDI11SDI biased high. No SPI write capability from processor to deviceB
CANL12RXD biased recessive, no communication from bus to processor. IOS current may be reached if VIO ≥ 3.3V.B
CANH13VO(REC) spec violated. May degrade EMC performanceC
nCS14nCS biased high. No SPI read/write capability between device and processorB
Note: The VSON (DMT) package includes a thermal pad