SLLA565 September   2021 TUSB1044

 

  1.   Trademarks
  2. 1Introduction
  3. 2TUSB1044 Configuration and Control Implementation
    1. 2.1 TUSB1044 Four-Level Pins
      1. 2.1.1 I2C_EN
      2. 2.1.2 VIO_SEL
      3. 2.1.3 UEQ[1:0] and DEQ[1:0]
      4. 2.1.4 CFG[1:0]
    2. 2.2 TUSB1044 Two-Level Pins
      1. 2.2.1 FLIP, CTL0, and CTL1
      2. 2.2.2 DIR0 and DIR1
      3. 2.2.3 SWAP
      4. 2.2.4 HPDIN
      5. 2.2.5 SLP_S0#
  4. 3TUSB1044 I2C Mode Implementation
    1. 3.1 TUSB1044 Operating Mode Configuration, General_1 Register, 0x0A
    2. 3.2 VOD Configuration, General_3 Register 0x0C
    3. 3.3 Upstream and Downstream Equalization Configuration Registers, UFP1_EQ, UFP2_EQ, DFP1_EQ, and DFP2_EQ Registers 0x10, 0x11, 0x20, 0x21
  5. 4Benefits of Using the I2C Mode Control
  6. 5TUSB1044 Host Implementation Example
  7. 6TPS6598X, TPS6599X Based I2C Control and Tuning
    1. 6.1 Enable PD Controller I2C Control of External Slaves
    2. 6.2 Example of I2C Configuration Upon PD Controller PoR Event and Detach Event
    3. 6.3 Example of I2C Configuration Upon Cable-Orientation Event and DP Configuration Event
    4. 6.4 Notes for Application
  8. 7References

2.1.3 UEQ[1:0] and DEQ[1:0]

The TUSB1044 receiver equalization (EQ) is to compensate for channel insertion loss and inter-symbol interference in the system. The receiver overcomes these losses by attenuating the low-frequency components of the signals with respect to the high-frequency components. Each channel has a receiver equalizer with selectable gain settings as shown in Table 2-4. Set equalization control for upstream and downstream facing ports using the UEQ[1:0], and DEQ[1:0] pins, respectively.

Figure 2-1 shows the TUSB1044 equalization settings.


GUID-20210707-CA0I-RBB0-ZBQR-RK9KDP4XF0TF-low.png

Figure 2-1 TUSB1044 Equalization Settings

Using the given trace lengths and data rate referring to the Figure 2-2 example, the method to select the equalization values for upstream and downstream EQ is to select the closest EQ gain value available to match the trace loss as follows:

  • Host to TUSB1044 trace length 8 in (7-dB loss at 5 GHz). UEQ setting of 7.1 dB.
  • TUSB1044 to connector trace length 2 in (1.7-dB loss at 5 GHz). DEQ setting of 3 dB

GUID-20210713-CA0I-XKHV-ZXRC-VLHP0WXP0SNT-low.gif

Figure 2-2 Reference Block Diagram for TUSB1044 Equalization Control

In the I2C mode, the equalization settings for each receiver can be independently controlled through I2C registers. For this reason, all of the equalization pins (UEQ[1:0] and DEQ[1:0]) can be left unconnected. If a different I2C slave address is desired, UEQ1/A1 and UEQ0/A0 pins should be set to a level other than ‘F’ which produces the desired I2C slave address.